City:  München
Date:  Feb 4, 2025

Master's Thesis: Design and layout of low power, low mismatch charge pump for PLL at 4 kelvin

The Fraunhofer-Gesellschaft (www.fraunhofer.com) currently operates 76 institutes and research units throughout Germany and is a leading applied research organization. Around 32 000 employees work with an annual research budget of 3.4 billion euros. 

The Fraunhofer Research Institution for Microsystems and Solid State Technologies EMFT, with currently almost 190 employees at its sites in Munich (headquarters), Oberpfaffenhofen and Regensburg, conducts cutting-edge applied research on sensors and actuators for people and the environment. The competences are based on impressive long-term experience and extensive know-how in the fields of microelectronics and microsystem technology. These nano- and microtechnologies are the basis for the other competence areas at Fraunhofer EMFT: sensor solutions, safe and secure electronics, and micropumps. The interdisciplinary interaction of these competencies enables the development of truly novel solutions, putting Fraunhofer EMFT in an ideal position for tackling the current challenges of our society.

 

What you will do

  • To understand changes of transistor parameter characteristics in cryogenic temperature (4 kelvin) based on literature and existing measurement results.
  • Literature review on existing low power and low mismatch charge pump topologies at 4k.
  • Behavioural modelling in Verilog-A.
  • Transistor level design and verification through simulation. 
  • Layout of the charge pump and post layout verification.
  • Documentation and presentation of the results.
  • Hand over the design task and support in integration. 

 

What you bring to the table

  • Course of Study in the field of Electrical and/or Electronics Engineering.
  • Basic understanding of CMOS devices and its operating region.
  • Good understanding of analog design, stability analysis, mismatch analysis, current mirrors, amplifiers etc.
  • Practical experience in transistor level design and simulation (in cadence virtuoso).
  • Practical experience in layout design is a big advantage.
  • Understanding of Phase locked loop is a big plus.
  • Independent, solution-oriented way of thinking.
  • Good English and/or German language skills.

 

What you can expect

We offer you a challenging task with responsibilities, room for creativity and many opportunities to gain new experience. You can expect an international, open-minded, and dynamic team, where you will be trusted from day one and encouraged to work independently. You will get supervision help from the team. Your contributions will play a vital role in advancing our research in the field of cryogenic electronics design in quantum computing.

 

We value and promote the diversity of our employees' skills and therefore welcome all applications - regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity. Severely disabled persons are given preference in the event of equal suitability. Remuneration according to the general works agreement for employing assistant staff.

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future. 

Interested? Apply online now. We look forward to getting to know you!

 

Fraunhofer Institute for Electronic Microsystems and Solid State Technologies EMFT 

www.emft.fraunhofer.de 

 

Requisition Number: 78232                Application Deadline: 02/28/2025

 


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