Ort:  München
Datum:  06.08.2024

Senior Analog Layout Engineer

Die Fraunhofer-Gesellschaft (www.fraunhofer.de) betreibt in Deutschland derzeit 76 Institute und Forschungseinrichtungen und ist eine der führenden Organisationen für anwendungsorientierte Forschung. Rund 32 000 Mitarbeitende erarbeiten das jährliche Forschungsvolumen von 3,4 Milliarden Euro.  

The Fraunhofer-Gesellschaft (www.fraunhofer.com) currently operates 76 institutes and research institutions throughout Germany and is the world’s leading applied research organization. Around 30 800 employees work with an annual research budget of 3.0 billion euros. 

 

The Fraunhofer Research Institution for Microsystems and Solid State Technologies EMFT, with currently almost 180 employees at its sites in Munich (headquarters), Oberpfaffenhofen and Regensburg, conducts cutting-edge applied research on sensors and actuators for people and the environment. The competences are based on impressive long-term experience and extensive know-how in the fields of microelectronics and microsystem technology. These nano- and microtechnologies are the basis for the other competence areas at Fraunhofer EMFT: sensor solutions, safe and secure electronics, and micropumps. The interdisciplinary interaction of these competencies enables the development of truly novel solutions, putting Fraunhofer EMFT in an ideal position for tackling the current challenges of our society.

 

You can look forward to an exciting task in the Circuit Design team located in our Munich office. In our team You will realize the layout of power-efficient integrated RF, analog and mixed-signal circuits in highly-scaled CMOS for intelligent mobile sensor and actuator applications based on specifications of our national and international customers and research partners.

 

Was Du bei uns tust

In the Circuit Design Team You will work closely together with expert analog and mixed signal designers to create low power analog- and mixed-signal integrated circuits for sensor and communication systems. You will collaborate with other teams, organizations, customers, and research partners to develop innovative ASIC solutions using advanced CMOS and BiCMOS process technologies for existing and new markets. You will train and mentor novice circuit designers in exploring and evaluating innovative circuit concepts, integrating layout design as a key component of their development process. You will supervise students in the course of writing their Bachelor's or Master's thesis.

 

Was Du mitbringst

  • Above-average academic degree in electrical engineering
  • At least 10 years of professional experience
  • Excellent communication skills and a teamplayer mindset
  • Tape-out experience with advanced CMOS processes
  • Very good knowledge of the performance and quality aspects of analog and mixed-signal integrated circuit layout (e.g. matching, cross-coupling and EMIR) 
  • Very good knowledge of the Cadence Layout Tools for the analog and mixed-signal layout, taking into account the layout dependent variability and parasitic effects 
  • Good knowledge of parametrized and scripted layout generation is an advantage
  • Good knowledge of the CAD environment setup for mixed-signal design is an advantage
  • Good knowledge of heterogenous integration is an advantage

 

If You enjoy creative work and the development of new ideas and prefer a structured and team-oriented way of working, then we look forward to receiving Your application!

 

Was Du erwarten kannst

In our open-minded team, You can set your own accents, realize your ideas in projects and develop yourself scientifically, professionally and personally. Fraunhofer supports Youou with various offers to reconcile family, career and career development as well as possible.

 

Wir wertschätzen und fördern die Vielfalt der Kompetenzen unserer Mitarbeitenden und begrüßen daher alle Bewerbungen – unabhängig von Alter, Geschlecht, Nationalität, ethnischer und sozialer Herkunft, Religion, Weltanschauung, Behinderung sowie sexueller Orientierung und Identität. Schwerbehinderte Menschen werden bei gleicher Eignung bevorzugt eingestellt.

 Anstellung, Vergütung und Sozialleistungen basieren auf dem Tarifvertrag für den öffentlichen Dienst (TVöD). Zusätzlich kann Fraunhofer leistungs- und erfolgsabhängige variable Vergütungsbestandteile gewähren.

Mit ihrer Fokussierung auf zukunftsrelevante Schlüsseltechnologien sowie auf die Verwertung der Ergebnisse in Wirtschaft und Industrie spielt die Fraunhofer-Gesellschaft eine zentrale Rolle im Innovationsprozess. Als Wegweiser und Impulsgeber für innovative Entwicklungen und wissenschaftliche Exzellenz wirkt sie mit an der Gestaltung unserer Gesellschaft und unserer Zukunft. 

Haben wir Dein Interesse geweckt? Dann bewirb Dich jetzt online mit Deinen aussagekräftigen Bewerbungsunterlagen. Wir freuen uns darauf, Dich kennenzulernen! 

 

Fragen zu dieser Position beantwortet Ihnen gerne:

David Borggreve
Gruppenleitung Circuit Design
david.borggreve@emft.fraunhofer.de

+49 89 54759-629
 

 

Fraunhofer-Institut für Elektronische Mikrosysteme und Festkörper-Technologien EMFT 

www.emft.fraunhofer.de 


Kennziffer: 74655                Bewerbungsfrist: 31.07.2024

 


Stellensegment: Electrical Engineering, Electronics Engineer, Drafting, Electrical, Engineering, Research